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Old 13th June, 2004, 11:14 PM
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Razorfish Razorfish is offline
Join Date: March 2004
Location: Manchester, UK
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Quite frankly im never suprised by anything that happens in computer hardware. i mean check this site out, Its a high powered computer based at the laboratory i work at!

The HPCx system is located at the UK's CCLRC's Daresbury Laboratory and operated by the HPCx Consortium.

The HPCx system uses IBM p690+ Regatta nodes for the compute and IBM p690 Regatta nodes for login and disk I/O. Each Regatta node contains 32 processors. At present there are two p690 service nodes. At the beginning of the user service on HPCx phase2 in April 2004, twenty p690+ nodes were used for compute jobs, offering a total of 640 processors. From Monday, 10 May, there were 38 frames, i.e. 1216 processors, available to users. Then the system had a throughput of at least 4.8 Tflops (4800 AU/hr). This was increased to 50 nodes offering 1600 processors end of May 2004. The peak computational power of the HPCx system is 10.8 Tflops peak, or at least 6 Tflops sustained. The complete new platform gave a value of 6,188 Gflops for the Rmax value of the Linpack benchmark. The service can thus provide 6,188 AUs per hour, 148,512 AUs per day.

Each Regatta system frame consists of 32 1.7 GHz POWER4 processors. In the POWER4 architecture, a chip contains two processors, together with the Level 1 (L1) and Level 2 (L2) cache. Each processors has its own L1 instruction cache of 128 kB and L1 data cache of 64 kB integrated onto one chip. Also on board the chip is the L2 cache (instructions and data) of 1.5 MByte, which is shared between the two processors. Four chips (8 processors) are integrated into a multi-chip module (MCM). Four MCMs (32 processors) comprise one frame. Each MCM is configured with 128 MB of L3 cache and 8 GB of main memory. The total L3 cache of 512 MB per frame and the total main memory of 32 GB per frame is shared between the 32 processors of the frame.

More information and some pictures at the website
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