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  #1 (permalink)  
Old 22nd June, 2006, 04:08 PM
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GET 'em While they are HOT!!! AMD CPU's EOL'ed!!!!

That's right...754, 939, and AM2 cores are taking a hiatus from the computing market, never to return. Earliest dates are THIS MONTH.

Check the pic for more.
http://www.aoaforums.com/forum/attac...1&d=1150988864
[source:http://www.dailytech.com/article.aspx?newsid=2974]
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GET 'em While they are HOT!!! AMD CPU's EOL'ed!!!!-1886_large_amd_eol_pricing.png  
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Old 22nd June, 2006, 05:03 PM
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aren;t they comming out with the new AM2's soon?
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Old 22nd June, 2006, 05:04 PM
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Wow. I didn't expect this. They're taking out a lot of their 90nm then, so I guess AMD is going to push 65nm really soon. It wouldn't surprise me if we saw some in a few months.
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Old 22nd June, 2006, 05:11 PM
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Quote:
Originally Posted by Redroar
Wow. I didn't expect this. They're taking out a lot of their 90nm then, so I guess AMD is going to push 65nm really soon. It wouldn't surprise me if we saw some in a few months.
I have someone who is building a PC in about 5 weeks any chance better cores will be out by then?
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Old 22nd June, 2006, 06:03 PM
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WTF!?!? It looks like they've EOL'd half their product line! Including chips that just came out!
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Old 22nd June, 2006, 06:41 PM
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Looks like I need to put in some overtime if their gonna be that cheap.
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Old 22nd June, 2006, 06:47 PM
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All 1MB cache chips. You should still be able to find these in the Opteron line, however, i have a feeling that speed-bins on the 1MB parts is what has pushed this move, as well as a slew of other things.

Or...they are ramping up 65nm production, in face of Intel's prices and impending release. If you look @ the timing indicated, it might seem as though those chips are the ones that clock highest...maybe due to lens tuning?

When 1MB parts equate to only a equivalent performance boost of 200mhz in comparison to 512k parts, and seeing the clocks i have from the newest 512k parts, I wholely understand the move, both to simplify the production line, and freeing fabs for new parts, as well as simplfying the SKU's, and making it easier for stores to maintain inventory, as well as themselves.

Based on order date cutoff and shipping cutoff, you can tell AMD has quite a stock of parts ATM. Great move, IMHO.
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Old 22nd June, 2006, 07:29 PM
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Quote:
Originally Posted by cadaveca
All 1MB cache chips. You should still be able to find these in the Opteron line, however, i have a feeling that speed-bins on the 1MB parts is what has pushed this move, as well as a slew of other things.
Hmmm......I missed that part. But, that makes sense, given some other things.

Think about the following:
  1. AMD and Intel are pushing dual cores hard as The Next Big Thing.
  2. Dual Core chews up twice as much space as a single core.
  3. Cache amounts to a huge chunk of today's CPUs. The figures that I have seen suggest that something on the order of 60 square millimeters is take up by that extra 512k of cache, or about 1/3 of the total area of the chip.
  4. AMD is still mostly at 90 nM, while Intel is at 65 nM. This means that, right off the bat, it costs AMD more silicon to make a chip than it does Intel. Granted, the smaller process is more expensive per unit area, but it is still cheaper to make equivalent performing parts at the smaller process.
  5. Some of the data on the web seems to suggest that the smaller cache chips will overclock to higher speeds.
Put that all together then, and AMD is simply reacting to Intel's pricing pressure by reducing costs on existing production (and probably ramping performance just a little bit more), until they can get into full swing on 65 nM.

It IS a smart move on AMD's part, but it would seem to indicate that AMD is playing 'plug the holes in the dike' until they can get 65 nM production running. The problem is that by the time they get going hard at 65 nM, Intel should be at 45 nM.
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Old 22nd June, 2006, 08:31 PM
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The one problem i have with your theory is the smaller cache chips clocking higher. Tis' not the case with current 939 chips. They do, however, offer more bandwidth, due to data spending less time on-chip.

In regards to running scared...it seems they are. Right now, they don't even offer a crossfire chipset for the new socket. It's coming, but it's a bit late. Intel, on the other hand, has 975 up and running, with boards starting to hit market in full force just this month, and by the time Conroe debuts on shelves, all platforms should be covered. It's unfortunate that nVidia won't liscence the 975 for SLi as well(it's more than capable), but i understand them wanting to keep thier cards @ 16x16 pci-e config.

At the "AMD Analyst Day", 65nm samples were up and running. I don't know how many errors they are currently posting, but I don't think it's that many. With Intel's cpu's far more stable than AMD's(less cpu errata), and the lack of a 65nm cpu debut, AMD might be a bit behind in the performance market.

But they have already stated their focus was on the server market. They just to match Intel in price=performance, but that's very hard given current numbers.
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Old 22nd June, 2006, 09:19 PM
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Quote:
Originally Posted by cadaveca
The one problem i have with your theory is the smaller cache chips clocking higher. Tis' not the case with current 939 chips. They do, however, offer more bandwidth, due to data spending less time on-chip.
As I said, "SOME of the data on the web SEEMS to suggest..."

However, even if you take that out of the picture, you've still got a pretty reasonable scenario, right? Right? (hopeful look)

And what about 'offer more bandwidth'? I'm a little lost there. The smaller cache chips will definitely CONSUME more memory bandwidth because of data spending less time on the chip, but that is a Bad Thing, not a Good Thing. Or am I missing something?

Quote:
Originally Posted by cadaveca
At the "AMD Analyst Day", 65nm samples were up and running. I don't know how many errors they are currently posting, but I don't think it's that many. With Intel's cpu's far more stable than AMD's(less cpu errata), and the lack of a 65nm cpu debut, AMD might be a bit behind in the performance market.
Err.....comparing Intel's errata sheet on a product that has JUST begun manufacturing to AMD's errata sheet on a product that is 3 years old doesn't seem like a terribly good way to evaluate the relative stability of the platforms to me?
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Old 22nd June, 2006, 09:26 PM
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no, I'm comparing like with like. I'm hoping Intel could continue the trend. P4 datasheet comtains less errata than the K8.

In regards to bandwidth...my 3800+ and 3500+ offer more than my 4400+ and 3700+, at the same speeds. Knowing that the L1 will make data calls across the L2, it only seems to make sense that a smaller L2 would mean that data would take less time to arrive @ the L1. Or have i got it wrong? Won't be the first time.
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Old 22nd June, 2006, 09:33 PM
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From what i've read somewhere (cant remember where) amd still cant produce enough opteron chips to meet demand and since at the wafer stage opterons and athlons are essentially the same chip all 1meg a64's are now being made into opterons to meet demand if there is any surpluss then they will be sold on as athlons but there isnt expected to be many. There current fab is allready at 150% operating capacity, the new one isnt churning out meaning full numbers of chips yet and is now scrambling to move to full 65nm in order to compete.

There partner fab in china (?) is picking up the slack @ 90nm whilst dresden scales down production in order to make the move to 65nm.

This is actually doing what amd wanted to do all along which the german gov' blocked (they didnt want the outsource to china).

They will be back but if intel keep up this die shrink rampage it will hurt amd in the long run. They were late in making the switch to 90nm and intel isnt all that far from starting 45nm trial production / fab conversion.

It is in advantage intel has for sure it has so many plants running different processes at once. They're also quick at converting fabs what with lexilip moving to 65nm allready
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Old 22nd June, 2006, 09:39 PM
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Depnds on yields @ 45nm too though, and noone really knows how good they will be. 55% @ 90nm for AMD is not good, but i hear Intel may be worse off @ 65nm, and the glut of sales due to AMD's rise in the market has been what has let them make fab conversions in due time...easy to change something not in use!
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Old 22nd June, 2006, 10:14 PM
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Quote:
Originally Posted by cadaveca
P4 datasheet comtains less errata than the K8.
Ok. I'll buy that. But there could be any one of about 2 dozen explanations for that, NONE of which have anything to do with the relative 'stability' of the two platforms. The most likely of those has to do with what we call in engineering 'corner cases'. I.E. when you do this, AND this, AND this, AND this condition, AND this condition, AND this condition all exist, THEN the product will not behave as expected. In the vast majority of cases, these are things that one won't see in the real world.

Not saying that this actually IS the case, as I've not looked at the errata, but it is certainly a plausible explanation, and in fact was EXACTLY what happened with the Motorola 68000 compared to the Intel 80286, IIRC.

Quote:
Originally Posted by cadaveca
In regards to bandwidth...my 3800+ and 3500+ offer more than my 4400+ and 3700+, at the same speeds. Knowing that the L1 will make data calls across the L2, it only seems to make sense that a smaller L2 would mean that data would take less time to arrive @ the L1. Or have i got it wrong? Won't be the first time.
Hmmm......I think I see where you are going. The extra 512k of cache WILL require some additional decoding logic, and an extra bank select line in all likelyhood, so it IS possible that a 512K cache would have slightly better throughput than a 1 meg cache. I'd be greatly surprised if the difference is measurable, let alone significant, though.

What are you seeing and how is it being measured?
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Old 22nd June, 2006, 10:16 PM
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Quote:
Originally Posted by cadaveca
Depnds on yields @ 45nm too though, and noone really knows how good they will be. 55% @ 90nm for AMD is not good, but i hear Intel may be worse off @ 65nm, and the glut of sales due to AMD's rise in the market has been what has let them make fab conversions in due time...easy to change something not in use!
This is not the first I've heard that yields are not that whippy. This amazes me, as the manufacturing background I have (which admittedly is not CPUs) would have considered anything below 90% to be bad, and anything below 80% would have stopped production.
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Old 22nd June, 2006, 10:30 PM
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Sure, but when you own teh fab, and silicon IS relatively cheap to make, in the raw, you can afford to kill a few slices. Think about it...45000 wafer starts a month...do you see that many cpu's selling, for 80, even 70% efficiency, from either side? And Intel's capacity is far larger than AMD's!(and i hear yields are worse!)


3408mb/Venice @ 250mhz, measured by memtestx86.
3105mb/Toledo @ 250mhz, measured by memtestx86
3256mb/Manchester @ 250mhz, measured by memtestx86
3186mb/Sandiego(Venus) @ 250mhz, measured by memtestx86
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Old 22nd June, 2006, 10:44 PM
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Quote:
Originally Posted by cadaveca
3408mb/Venice @ 250mhz, measured by memtestx86.
3105mb/Toledo @ 250mhz, measured by memtestx86
3256mb/Manchester @ 250mhz, measured by memtestx86
3186mb/Sandiego(Venus) @ 250mhz, measured by memtestx86
This is very interesting. What do the cache bandwidth figures look like?
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Old 22nd June, 2006, 11:34 PM
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all relatively the same(and this increases with clockspeed as the cache runs the same speed as cpu). I do not have exact numbers, but i do know that it is far closer...within 50mb. I think that a cache with higher association would remedy this difference, but i also think that these cores do not fully maximize thier cache either.
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Old 23rd June, 2006, 03:59 AM
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Hmm...............
I have to wonder if these figures aren't the result of some kind of measurement variation, somehow. Aren't these four cores supposed to have the same memory controller in them?
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Old 23rd June, 2006, 04:34 AM
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no, they are not. Memorycontrollers have been revised many times over the duration of each core...as really, the memory controller is not part of the core, but part of the die.

And yes, of course, depending on where the data was called from would skew numbers either way, but i figured it was because of the 2-way associative cache interfacing the crossbar before the memory controller that made these differences more apparant @ the ram level. As the number of calls increases, the effect should be more apparant as calls get queued up.

I also think this is part of the reason that Conroe is so efficient...with the crossbar between the L1 and L2 for each core, and an 8-way associative cache, it can handle far more calls before showing a negative impact, as it can properly order those calls in the most efficient way. However, this also means that there are situations where the K8 can outshine Conroe...and we are starting to see this reflected a bit more on reviews.


Oh, and one more thing...cpu errata is becoming increasingly more important...in a highly-threaded world, the chance of this, that, the other thing, and that thing, all happening at once is far more likely, IMHO. Less chances means more reliability, and why i mentioned errata even.
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Last edited by cadaveca; 23rd June, 2006 at 04:44 AM.
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