Low voltage at CMOS Battery a contributing factor in BIOS chip corruption???

[Uncle Bob]

Could this be a factor in your BIOS corruption problems? It sure seems to be worth looking at in my mind. Anytime a $1.10 part can fix a $150 board, it's worth looking at. I'm told: "don't sweat the small stuff, just fix it." and this seems like it's appropriate! Let me know what you think!

More discussion here as well.

[Aedan]

Sounds v odd to me.

The battery keeps all 256bytes of static RAM alive even when there's no power source to the board. Those 256 bytes of static RAM are where all the BIOS settings are kept. They require very little power, and typically can manage to keep it's store even at 2.5V (in my experience with battery backed up static RAM). In terms of currents required, typically we're talking in the order of micro amps. The battery isn't used when the PC is powered, as accessing static RAM increases it's current consumption massively.

In terms of actually re-writing the FLASH, the CMOS battery plays no part, and you certainly wouldn't want it to either!

The static RAM and BIOS are actually two physically seperate devices, and do completely different things. People seem to confuse them however!

Áedán

[Uncle Bob]

Thanks, Áedán. I read further last night about the purpose of the CMOS battery and came to the same conclusion of which you speak. All that's left puzzling me are these questions:
Is the nForce BIOS configuration any different from say a VIA (me thinks not)
How is is that this could have anything to do with a board "coming back to life"???

I'm left to conclude it's rather bogus, but I must admit I was hooked at first!

[Aedan]

Originally posted by Uncle Bob
Is the nForce BIOS configuration any different from say a VIA (me thinks not)
How is is that this could have anything to do with a board "coming back to life"???

My suspicion (not having an nForce2 board to try with) is that the method of accessing the SRAM and RTC are probably the same. How the BIOS itself organises that information is actually entirely up to the BIOS. Yes, there are some conventions - for example, drive type used to be stored in a particular memory location in the SRAM.

On the other hand, the BIOS normally checks that the CRC stored in the SRAM matches the CRC calcuated from the SRAM. I guess it's possible for a corrupt SRAM to just happen to have the correct CRC value (or a BIOS not to bother checking it? Unlikely though) If the BIOS tried using invalid values for some of the setup, then that could lead to a problem.

Áedán

[Uncle Bob]

The "settings" for the bios are held in the southbridge, it may be that the MCP-T is more sensitive to low battery than a via chipset.

It might be worth noting that the new bios chips are 3.3v.

Im not sure if thats part of this bios corruption issue or not, but if the bios chip is under volted at 2.9v that might make the bios more sensitive.

Hooking up 3 1.2v cells rather than the battery might be worth trying.

[muzz]

Originally posted by Uncle Bob


Hooking up 3 1.2v cells rather than the battery might be worth trying.

Good Luck Bob...... let me know how you make out.....

muzz

[Aedan]

Originally posted by Uncle Bob
The "settings" for the bios are held in the southbridge, it may be that the MCP-T is more sensitive to low battery than a via chipset.

It might be worth noting that the new bios chips are 3.3v.

Im not sure if thats part of this bios corruption issue or not, but if the bios chip is under volted at 2.9v that might make the bios more sensitive.

Hooking up 3 1.2v cells rather than the battery might be worth trying.

Whoa - step back a bit here! The new BIOS chips (The FLASH ROM part) are 3.3v, inline with the rest of the chipset. This means the designers don't need to worry about having 5V tolerant inputs on the chipset, or level translators just to talk to the FLASH ROM.

The BIOS chip just stores the BIOS software - there are NO settings stored in the BIOS chip. In fact, the battery doesn't even supply power to the BIOS chip - there's no need to, as it's FLASH based and can quite happily remember it's contents without power, whatever power is being supplied. Hence, the battery voltage has no effect on the BIOS itself.

On the other hand, the CMOS RAM and RTC do require power to retain their settings (and time). However they are not held in the same place as the BIOS software, probably residing in either the southbridge or IO controller. (Anyone confirm what the IO controller is on any of these boards? Winbond part perhaps?)

If the CMOS RAM/RTC requires 3V, 3.3V may be on the upper end of the tolerance, especially if you're talking about a power source that is designed to output at 3.3V nominally. 3 times 1.2V cells is getting on for 3.6V and higher if the batteries have just been charged.

Áedán