Write speeds for phase-change memory reach record limits

[danrok]

Scientists bring us closer to wider use of phase-change memory (PRAM) chips.

Story here:
Write speeds for phase-change memory reach record limits | Ars Technica

[Daniel ~]

Why don't they just use quantum tunneling like everyone else? ":O}

I'm beginning to doubt that there is a single aspect of my life that is not being changed in significant ways, hardly any of which I can or do understand.

[cloasters]

So this PRAM formula is good for 10,000 write and read cycles? Can DRAM handle a million? Yes, this stuff can be confusing.

[Daniel ~]

I would guess many millions/ billions of tranactioms, but I would be guessing...

[Gizmo]

Originally Posted by Daniel ~

I would guess many millions/ billions of tranactioms, but I would be guessing...

It's effectively unlimited, but with some caveats: DRAM stores information by charging a capacitor. The problem is, the cap is leaky and looses charge over time (a few milliseconds, typically). In addition, reading the bit cell is destructive.

To deal with these problems, DRAM implements refresh cycles, where the memory controller reads the memory, then writes what it read back into the memory it just read from. The same thing happens when you cause the CPU to access the memory address; the memory cell is read, the data are returned to the CPU and in the background the controller is writing the data back to the DRAM cell.

Coupled with this, you've got problems with the ever shrinking geometries causing the capacitors to become ever more leaky, and also more vulnerable to having bits get randomly toggled by cosmic rays. In addtiion, the charge being stored is so small now that when reading the data back, the controller is effectively guessing what was just read (rather like modern hard drives, actually).

It's a wonder our computers work at all.

[danrok]

So long as cosmic rays are present, all is good!

[Daniel ~]

So long as they don't bring the harsh word! ":O}